The present invention relates to gain control of amplifiers, and more particularly to a precision automatic gain control circuit.
Automatic Gain Control (AGC) circuits are used in many communication and signal processing applications. For example, in the receiver of a wired or wireless communication link, the intended signal to be processed may be a short distance away and therefore relatively strong while another signal may be a long distance away and much weaker. The receiver must process both the strong signals and the weak signals which implies a variable gain function. High gain is used to detect and amplify weak signals and low gain and/or attenuation is used to process strong signals.
The most simple gain stage that can implement an AGC function is the basic differential pair of transistors. An exemplary differential pair stage includes a pair of bipolar transistors Q1, Q2 having their emitters coupled together and to a bias current sink. A pair of load or bias resistors is each coupled between a respective collector of the differential pair and a voltage supply signal. A differential input is applied across the bases of the transistors, and a differential output is developed across the respective collectors. The gain of this stage is the transconductance of either transistor Q1 or Q2 multiplied by the load resistance. By simply varying the transconductance, the gain is changed. The transconductance can be varied by changing the bias current. A fundamental problem with this type of Automatic Gain Control (AGC) circuit is that it has limited input signal swing capability. Input differential voltages of approximately 50 millivolts (mV) peak to peak begin to cause significant nonlinearities, which are unacceptable in many applications. Such nonlinearities, for example, may result in a total harmonic distortion (THD) that is greater than 1%. In high performance systems, AGC functions may need to handle input differential voltages as large as two (2) volts peak to peak, making this AGC stage unacceptable.
The next most common gain stage used for AGC functions is the differential pair with emitter degeneration. This gain stage is similar to the simple gain stage just described and further includes a pair of emitter degeneration resistors to increase the input signal swing capability. In particular, the emitters of the differential pair of transistors Q1, Q2 are not connected to each other. Instead, each emitter is coupled to one end of a respective one of the emitter degeneration resistors. The other ends of the resistors are coupled together and to the bias current sink. The emitter degeneration resistors are ideally linear. The overall transconductance of this stage is decreased by the emitter resistors and their presence allows for more of the input signal to appear across these resistors than across the nonlinear base-emitter junctions of the transistors Q1 or Q2. This results in significantly improved linear handling of large input differential voltages. As the emitter resistors are increased, however, the overall transconductance of the stage becomes less and less dependent on the transistor""s transconductance and more dependent on the emitter resistors. A fundamental problem with this arrangement is that the ability to vary the gain by changing the bias current is severely limited as the emitter resistors are increased.
More advanced AGC circuits have been suggested. One idea is to provide an analog attenuator in front of a fixed gain operational amplifier (op-amp). There are several problems with this arrangement for certain applications. First, the analog attenuator circuit requires a stack (cascode) of at least three transistors and resistors, which reduce voltage swing capability. Next, placing an attenuator in front of a large fixed gain amplifier forces the resistors that make up part of the attenuator circuitry to be very low-valued in order to meet reasonable noise performance. These low valued resistors require significant supply current.
An automatic gain control (AGC) amplifier according to an embodiment of the present invention includes a high gain amplifier, a feedback network and multiple amplifier stages coupled in the feedback path of the AGC amplifier. The feedback network has a first end that receives an input signal of the AGC amplifier, a second end coupled to the output of the high gain amplifier and multiple intermediate nodes. Each amplifier stage has an input coupled to a corresponding intermediate node of the feedback network and an output coupled to the input of the high gain amplifier. Each amplifier stage is independently controllable to position a virtual ground within the feedback network to control the closed loop gain of the AGC amplifier.
In respective embodiments, the high gain amplifier may be a transimpedance amplifier. Also, each amplifier stage may be a transconductance stage. In this manner, a voltage at an intermediate node of the feedback network is converted to a current by a transconductance stage, which current is applied to the input of the transimpedance amplifier. The transimpedance amplifier converts currents from all of the transconductance stages into an output voltage, which is applied to an output end of the feedback network. Further, each transconductance stages may include a controllable bias current device, so that the gain of the AGC amplifier is controlled by a transconductance ratio, which is further controlled by the respective currents of the bias current devices. In particular, the bias current devices are controlled to change the transconductance of each transconductance stage, which varies the overall closed loop gain of the AGC amplifier.
The feedback network may include resistors coupled in series between the input signal and the output signal and having at least two intermediate junctions. The amplifier stages are controlled to position a virtual ground at or between the intermediate junctions, so that the gain of the AGC amplifier may be defined by a resistive ratio of resistors in the feedback network.
The AGC amplifier may be configured to operate with differential signals. In particular, the high gain amplifier may be a differential amplifier having a differential input and a differential output. The feedback network may have a differential input for receiving a differential input signal, a differential output coupled to the differential output of the high gain amplifier and two or more intermediate differential nodes. Each amplifier stage may have a differential input coupled to a respective intermediate differential node of the feedback network and a differential output coupled to the differential input of the high gain amplifier.
In a more particular differential embodiment, each amplifier stage includes a differential pair of bipolar transistors (e.g. NPN bipolar junction transistors) having a common-coupled pair of emitters, a pair of bases forming the differential input and a pair of collectors forming a differential output. Each amplifier stage further includes a controllable bias current device coupled to the common-coupled pair of emitters of the differential pair of bipolar transistors. Also, the feedback network may include first and second sets of resistors, each set coupled in series between corresponding polarities of the differential input signal and the differential output of the high gain amplifier. The dual series-coupled resistor sets form two or more intermediate differential nodes. Shunt resistors may be included, each coupled between first and second polarities of an intermediate differential node of the series-coupled resistor sets.
In one embodiment, each amplifier stage has a bias terminal. A control circuit is provided that develops a plurality of bias currents, each provided at a bias terminal of a corresponding amplifier stage. In this manner, the bias currents of the control circuit are used to vary the gain of the AGC amplifier. The control circuit may be implemented in any desired fashion to control the gain. In one embodiment, the control circuit is configured to vary gain of the AGC amplifier in an exponential fashion, such as linear in decibels (dB) or the like. Alternatively, the control circuit may be devised to change the gain in a linear fashion. Any useful gain relationship may be employed.
In more specific configurations, a collective sum of the bias currents of the control circuit is maintained at a constant level while varying the gain of the AGC amplifier. Also, the control circuit may be configured to assert up to two bias currents at any given time throughout a predetermined gain range. Further, the asserted pair of bias currents may be asserted in linear fashion, such as a first bias current being linearly increased between a minimum current level and a maximum current level while a second bias current is linearly decreased between the minimum and maximum current levels. The control circuit may receive a differential control input current and include several current summing and differencing circuits to develop the bias currents. Such summing and differencing circuits may be employed, for example, to develop a plurality of ramped or triangular shaped bias current waveforms based on the differential control input current for generating precise current ratios and turn-on and turn-off set points.
The predetermined gain range of the AGC amplifier may have multiple intermediate gain levels based on the bias currents. For example, the gain may be varied from a first gain level to a second gain level by linearly increasing a first bias current from a minimum current level to a maximum current level while linearly decreasing a second bias current from the maximum current level to the minimum current level. Also, the gain may be varied from the second gain level to a third gain level by linearly decreasing the second bias current from the maximum current level to the minimum current level while linearly increasing a third bias current from the minimum current level to the maximum current level, and so on. As many intermediate nodes, amplifier stages and bias currents may be employed to provide any level of gain control as desired. The gain range is only limited by the physical components employed to implement the AGC amplifier, such as the voltage limits of the high gain amplifier. It is noted, however, that individual AGC amplifiers may be implemented in a cascaded configuration. In this manner, the output of a first AGC stage is multiplied by the gain of a second stage, and the output of the second stage may be multiplied by the gain of a third stage, and so on.
An integrated circuit (IC) according to an embodiment of the present invention may include at least one input terminal for receiving an input signal, at least one output terminal for providing an output signal, at least one control terminal for receiving a gain adjust signal, and an automatic gain control (AGC) amplifier incorporated onto the IC. The AGC amplifier has an input and an output coupled in a processing path between the input and output terminals of the IC and has a control input that receives the gain adjust signal.
In one embodiment, the AGC amplifier includes a high gain amplifier, a feedback network, and multiple feedback amplifier stages. The feedback network has a first end forming the input of the AGC amplifier, a second end coupled to the output of the high gain amplifier and multiple intermediate nodes in a similar manner as previously described. Each feedback amplifier stage has an input coupled to a respective one of the intermediate nodes of the feedback network, an output coupled to the input of the high gain amplifier, and a control input. A gain control circuit is provided, which has an input for receiving the gain adjust signal and multiple bias control outputs. Each bias control output is coupled to a control input of a feedback amplifier stage. The gain control circuit asserts a bias signal at each control input of a feedback amplifier stage to position a virtual ground within the feedback network to control closed loop gain of the AGC amplifier based on the gain adjust signal.
The IC may be configured as a radio frequency (RF) communication chip, such as a zero-intermediate frequency (ZIF) transceiver or the like. In one embodiment, the IC includes an input amplifier circuit, an oscillator circuit, a mixer circuit and a filter circuit.
The input amplifier circuit has an input coupled to the IC input terminal for receiving an RF receive signal and an output that asserts an amplified RF signal. The oscillator circuit asserts a carrier signal to an input of the mixer circuit, which has a second input coupled to receive the amplified RF signal. The mixer circuit has an output for asserting a mixed channel signal. The filter circuit filters the mixed channel signal and asserts a corresponding baseband channel signal. The AGC amplifier receives and amplifies the baseband channel signal.
In another embodiment, the IC operates with in-phase and quadrature signals. For example, the oscillator circuit asserts an in-phase carrier signal and a quadrature carrier signal. The mixer circuit includes a first mixer that receives the in-phase carrier signal and that asserts an in-phase mixed channel signal, and a second mixer that receives the quadrature carrier signal and that asserts a quadrature mixed channel signal. The filter circuit includes a first low-pass filter that filters the in-phase mixed channel signal to develop an in-phase channel signal and a second low-pass filter that filters the quadrature mixed channel signal to develop a quadrature channel signal. The AGC amplifier includes a first and second AGC amplifiers. The first AGC amplifier receives and amplifies the in-phase channel signal and asserts a first amplified in-phase channel signal on a first output terminal of the IC. The second AGC amplifier receives and amplifies the quadrature channel signal and asserts a second amplified in-phase channel signal on a second output terminal of the IC. Each AGC amplifier has multiple control inputs coupled to the bias control outputs of the gain control circuit. In this manner, the gain control circuit simultaneously controls both AGC amplifiers.
The IC signals may be differential signals. For the differential configurations, the high gain amplifier may be a differential amplifier with a differential input and a differential output. The feedback network may have a differential input for receiving a differential input signal, a differential output coupled to the differential output of the high gain amplifier, and multiple intermediate differential nodes. Each amplifier stage may have a differential input coupled to a respective intermediate differential node of the feedback network and a differential output coupled to the differential input of the high gain amplifier. In a similar manner as described previously, the amplifier stages may be configured as transconductance stages, each having a bias current input. The gain control circuit develops a bias current for each transconductance stage to control the gain of both AGC amplifiers.
A gain control circuit according to an embodiment of the present invention controls the gain of an AGC amplifier having a high gain differential amplifier and a differential feedback network with multiple intermediate differential nodes coupled together in a similar manner as previously described. The gain control circuit includes multiple transconductance stages and a control circuit. Each transconductance stage has a differential input for coupling to a respective intermediate differential node of the feedback network, a differential output for coupling to the differential input of the high gain differential amplifier, and a bias control input. The control circuit has an input for receiving the gain adjust signal and multiple bias control outputs. Each bias control output is coupled to a control input of a corresponding transconductance stage. The control circuit asserts a bias signal at each control input to position a virtual ground within the feedback network to control closed loop gain of the AGC amplifier based on the gain adjust signal.
The control circuit may be configured in any desired fashion for controlling the transconductance stages to further control the gain of the AGC amplifier. For example, the control circuit may be configured so that a collective sum of asserted bias currents remains substantially constant while varying the gain of the AGC amplifier throughout a predetermined gain range. Also, the control circuit is configured so that only two bias currents are asserted at a time throughout the gain range, and where each asserted bias current is linearly varied between a predetermined minimum current level and a predetermined maximum current level. The control circuit may receive a differential gain adjust control current and include several current summing and current differencing circuits. In one embodiment, the control circuit includes several current differencing circuits, each including metal oxide semiconductor (MOS) transistors coupled together to form a pair of input terminals receiving the differential gain adjust control current and an output terminal asserting a difference current. The relative sizes of the MOS transistors are selected to achieve a desired differencing function.
In a specific MOS-based embodiment, each differencing circuit includes first, second, third fourth P-channel MOS (PMOS) transistors, each having sources coupled to a supply signal. The drain of the first PMOS transistor forms the output terminal. The gates of the first and second PMOS transistors are coupled together and to the drains of the second and third PMOS transistors to form a first input terminal. The gates of the third and fourth PMOS transistors are coupled together and to the drain of the fourth PMOS transistor to form a second input terminal. A summing circuit may be provided, which includes first and second PMOS transistors having their sources coupled to the supply signal. The gates of both transistors are coupled together and to the drain of the second PMOS transistor to form a summing junction. The drain of the first PMOS transistor forms an output terminal that sums currents applied at the summing junction.
It is appreciated that a gain circuit as described herein has a gain that is varied as the virtual ground is varied. The gain is determined by a resistor and/or transconductance ratio, which can change linearly, exponentially (e.g., linear in dB), or according to any other useful function. A gain control network is provided which is within and part of the closed loop amplifier gain circuit. The gain circuit may be DC or AC coupled, and may be cascaded with other similar gain circuits. A differential gain circuit is disclosed that does not require a common mode reference. The gain circuit has a low absolute gain tolerance and excellent gain matching across different gain circuits on the same silicon die of an IC. A control circuit is described that allows optimization of both noise and linearity performance in the gain circuit. This capability is allowed for by individually sequencing transconductance cells that make up the gain circuit so that only two are active at any given time. The control circuit may implement a ramp function which has precise current ratio capability and precise turn-on and turn-off set points. The control circuit may also be cascaded if desired.